// module name: rom
// author: yangtao2019
// date: 2021.07.12

`timescale 1ns / 1ps

// default capacity: 4KB-2^12-128*32bits-128*4Bytes
module rom
#(
    parameter ADDR_LEN = 7,
    parameter CAPACITY = (2<<ADDR_LEN)*32
)
(
    input [ADDR_LEN-1:0] addr,
    output [31:0] read_data
);

    parameter n = (2<<ADDR_LEN);

    // regs
    reg [31:0] regs[n-1:0];
    integer i;
    initial begin: test
        $readmemh("D:/Vivado_project/oscpu01/oscpu01.srcs/data/inst_mem_test0.txt", regs);    
        // for (i=0;i<n;i=i+1)
        //     $display("%h", regs[i]);
    end

    assign read_data = regs[addr<<2];

endmodule